[OT] Hardware Info Help

[Aaron Grewell]

All the more since so many people overclocked their Celerons rather than
buy a higher-MHz PII or PIII.  In the PII days this was Intel's own
fault since the PII's cache ran at half processor speed, whereas the
Celeron's was full-speed.  This made an OC'd Celeron faster
clock-for-clock than a PII of the same speed, even with the larger cache
of the PII.  With the PIII this went away, so now it's just a price
game.  They keep the bus speeds lower as well so as to avoid encouraging
the kind of rampant OC'ing that went on with the PII Celeron.  If they
didn't lots of people would buy 1.7G Celerys and run them at 800MHz FSB
and leave many P4's in the dust.  Intel hates it when you do that. 
Unless you fry the chip, in which case it's just more money for them. :)

On Wed, 2003-01-08 at 13:33, Federico Voges wrote:
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> Hi,
> 
> Well, Intel is doing something similar too. The new Celerons (1.7Ghz
> and up, all socket 478) are P4 with 128kb L2 cache (as Lonni said). But
> the max freq available now is 2.2GHz when you have a 3.06GHz P4s.
> They'll keep the Celerons waaaay behind the P4.
> 
> BTW, There are P4 (as well as PIIIs) with 512kb L2 cache. 
> 
> On 08 Jan 2003 13:20:32 -0800, Aaron Grewell wrote:
> 
> >The original Celeron had no L2 cache at all.  Its performance was so
> >abysmal that Intel had to quickly come out with the Celeron "A" which
> >includes the 128KB L2 cache we know today.  K-6-II and III chips
> >definitely gave better bang for the buck than the original Celerons, but
> >the Celeron A was the last nail in K6's coffin and led to the
> >introduction of the Duron, AMD's low-cache processor.  The Duron not
> >only whupped up on any Celeron ever made, it ate into Athlon sales as
> >well, which is why it is going the way of the dodo.  For this next round
> >it looks like AMD will use 32-bit chips against Celeron and 64-bit
> >against P4, being more careful to keep the clock speeds differentiated
> >this time.  We'll see how well that works.
> >
> >
> >On Wed, 2003-01-08 at 12:22, Stuart Biggerstaff wrote:
> >> And at that isn't it something like double the cache of the original Celeron?
> >> 
> >> Of course it's worth noting that whether they suck or not just about all 
> >> current processors are i686 (Pentium Pro).  I think the AMD K6 series was 
> >> the last i586 put in many PCs, and though they would often outperform the 
> >> early Celerons, they wouldn't run software compiled for i686 while the 
> >> Celerons would.
> >> 
> >> At 03:01 PM 1/8/03 -0500, Net Llama! wrote:
> >> >Its also worth nothing that Celerons have a 128KB cache, while the
> >> >'normal' PIII & PIV chips have a 256KB cache.
> >> >~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> 
> Federico Voges
> Socio gerente
> 
> Intrasoft
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> Argentina
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> Te/Fax: 54-11-4833-5182
> e-mail: fvoges at intrasoft.com.ar
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> 
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> -----BEGIN PGP SIGNATURE-----
> Version: PGPsdk version 1.7.1 (C) 1997-1999 Network Associates, Inc. and its affiliated companies.
> 
> iQA/AwUBPhyZKRRcJRaVKt4XEQIi4QCeKNgMhxjIZZWgp4GgbDeL4RxEbKUAoNQL
> 81A5cAt+aLdObYPbILaSaLO7
> =Jckn
> -----END PGP SIGNATURE-----
> 
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